Jeff Thomas

Jeff Thomas is a highly experienced engineering professional with a strong background in ASIC design and management. Currently serving as a Senior Principal Engineer at Western Digital since July 2008, Jeff has previously held leadership roles such as Director of ASIC Design at iStor Networks, Inc. and Engineering Manager at CoSine Communications. Early career experience includes positions at Silicon Graphics as Senior MTS/Engineering Manager and at S-MOS Systems as an ASIC Design Engineer. Jeff began professional development with Amdahl Corporation as MTS. Educational credentials include a Master’s in Electrical Engineering from the University of Southern California, a Bachelor’s in Electrical Engineering from Stanford University, and a Bachelor’s in Business Management from Claremont McKenna College.