Wiliot
Regev J. is a VLSI Engineer at Wiliot since August 2021, bringing expertise in integrated circuit design and development. Prior to this role, Regev J. worked as a Radar Signal Processing System Engineer at ELTA Systems Ltd from September 2019 to July 2021, focusing on algorithms development for radar systems. Regev J. holds a Bachelor of Science degree in Computer Engineering from Ben-Gurion University of the Negev, earned in 2020.
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