Ishay Vaisid

Ishay Vaisid is an experienced ASIC design leader with a robust background in VLSI design and management. Currently serving at Xsight Labs LTD since September 2019, Ishay previously held the position of VLSI Design Manager at Valens from December 2017 to August 2019, overseeing the entire chip development process within the R&D team. Prior to that, Ishay spent over 13 years at Marvell Semiconductor, progressing from a Design Engineer to Senior Staff Design Manager, where responsibilities included managing the switching product line's Full Chip design and backend team, as well as leading projects for various SOC Armada and Avanta devices. Ishay earned a degree in Electronics from Tel Aviv University, completing studies between 1995 and 1999.