ZeroPoint Technologies
Vasileios Spiliopoulos is currently the Architecture Lead at ZeroPoint Technologies and previously served as a PhD student and Teaching Assistant at Uppsala University. Vasileios also completed an Industrial Placement at ARM and holds a Doctor of Philosophy (PhD) in Computer Science from Uppsala University and an Engineer's degree in Electrical and Computer Engineering from the University of Patras.
ZeroPoint Technologies
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ZeroPoint Technologies uses novel compression approaches to develop and license a memory compression IP block placed on the SoC processor chip to effectively double memory capacity and memory bandwidth.