Richard P. is an experienced engineering professional with a focus on FPGA design and software development. Currently serving as MTS at 8090 Solutions Inc. since August 2024, Richard previously held the role of MTS and FPGA Design Lead at CacheQ Systems, Inc. from March 2018 to September 2024. Prior experience includes significant positions at Gidea Lab as Principal Software Engineer, Xilinx as Product Planning Manager (post-acquisition by AMD), Altera as Strategic/Technical Marketing Manager (post-acquisition by Intel), and L-3 Communications as Senior FPGA Architect. Richard began the career with co-op roles at ATI, Unisys, and SGI. Education credentials include a Bachelor of Science in Computer Engineering from Drexel University and a Master of Science in Electrical Engineering with a focus on FPGA/ASIC Design from Rowan University.
This person is not in the org chart
This person is not in any teams