Roopa Mangalagiri

Roopa Mangalagiri is a VLSI (Physical Design) Engineer at ACL Digital since August 2021. Prior to this, Roopa worked as a Physical Design & Layout Intern at VEDA IIT and Entuple Technologies Pvt. Ltd. Roopa has experience working with tools like Cadence Innovus and technologies like 45nm. Roopa also served as a Teach for India Fellow, where Roopa worked as a teacher in the fellowship program. Roopa holds a Master's degree in VLSI & Embedded system design from Vasavi College of Engg, and a Bachelor's degree in Electronics and Communications Engineering from RGUKT Basar. Additionally, Roopa completed their PUC and SSC education from RGUKT Basar and St. Agnes High School respectively.