Rana Numan is a design verification engineer at AMD since August 2024, with previous experience as an ASIC verification engineer at Rapid Silicon, where responsibilities included testbench development using UVM and verification of CXL ARB/MUX and PHY layers. Prior to that, Rana served as a hardware design engineer at DreamBig Semiconductor Inc., focusing on UVM component development and block level verification. Rana also gained foundational skills during a trainee position at Lampró Méllon, working with Verilog/System Verilog and RISCV assembly. Rana holds an Electronics Engineering degree from the University of Engineering and Technology, Taxila, earned in 2019.