Ping-Hsuan Lai

Ping-Hsuan Lai is a Senior Physical Design Engineer at Ambarella Inc since December 2018, specializing in computer vision chip tape-out with Samsung N10 and N5 nodes and advancing APR flow development for these nodes. Prior to this role, Ping-Hsuan Lai worked at 台積電 as a Physical Design Engineer from October 2014 to November 2018, where responsibilities included test chip implementation and Innovus N7 APR flow development for floorplan, placement, CTS, and routing. Ping-Hsuan Lai holds a Master's Degree and a Bachelor's Degree in Computer Science and Information Engineering from National Cheng Kung University, completed in 2014 and 2012, respectively.