Ashok Aradhya

Ashok Aradhya has a diverse work experience in the field of chip design and verification. Ashok worked as a Verification Manager at Arasan Chip Systems Inc. from March 2011 to present, where they were involved in developing complex verification testbenches using various methodologies and implementing them based on customer requirements. Ashok also handled customer meetings and provided support throughout the project lifecycle.

Prior to their role at Arasan Chip Systems Inc., Ashok worked as a Senior Engineer at AMCC from January 2010 to February 2011. Here, they developed complex verification testbenches for multiple IP's and system-level verification.

From April 2008 to January 2010, Ashok worked as an I.C. Design Engineer at ST Microelectronics. Ashok designed and verified major projects at both the IP and SOC level for ARM and ST based processors.

Before joining ST Microelectronics, Ashok worked at Panasonic from March 2003 to April 2008 as an R&D Staff Engineer. Here, they designed, developed, and verified IP, SOC, and ASIC level projects. Ashok also developed complex verification testbenches for multiple IP's and video decoding standards.

Ashok's work experience began at Indscape Softech Pvt Ltd in 2002 as an Embedded Development Engineer, where they worked on embedded development projects.

Overall, Ashok Aradhya has extensive experience in chip design and verification, having worked on a variety of projects and IP's for multiple companies.

Ashok Aradhya completed their Bachelor's degree in Electronics and Communication from P.E.S. College of Engineering from 1995 to 1999. Ashok then pursued a Master's degree in Electronics from S.J.C.E, Mysore from 2000 to 2002. Apart from their formal education, they have also obtained certifications in Japan language basic and advanced training, although specific information regarding the institution and the dates of obtaining these certifications is not available.