Romain F.

Romain F. has a diverse work experience spanning several roles in different companies.

Romain started in 2010 as a Test Operator at SYLUMIS, where they worked until February 2011.

In 2011, they joined FLIR Systems as an Electronic Technician, specializing in PCB design, and stayed until September 2012.

Following that, Romain worked at Labinal Power Systems as an Electronic Engineer focused on digital design from April to August 2015.

In 2016, they joined Safran Electronics & Defense as an FPGA Engineer. In this role, they were responsible for the FPGA-based design to stream uncompressed HD-SDI type video over a Gigabit Ethernet network.

Starting from April 2017, they took on the role of Design Engineer at Nokia. Later on, in March 2018, they transitioned to the position of Verification Engineer, focusing on 5G Layer-1 Uplink Front-end. Romain worked in this position until January 2021.

Currently, Romain is employed at Arteris IP. Romain started as a Design Verification Engineer in January 2021 and got promoted to Senior Design Verification Engineer in April 2022 and is still holding that position.

Romain F. pursued their education with a focus on engineering. Romain started by attending Université Paris-Est Créteil (UPEC) from 2010 to 2012, where they obtained a two-year university diploma in Electrical, Electronic and Computing Engineering (DUT GEII). Following this, they enrolled at ESIEE PARIS from 2012 to 2016, where they earned a Diplôme d'ingénieur (Master's degree) majoring in Microelectronic systems. The provided information does not specify any particular field of study within these degrees.