Farhad Haghighi Zadeh

Farhad Haghighi Zadeh is a Principal Digital Design Engineer at Astera Labs, with extensive experience in digital design engineering, spanning roles at The Six Semiconductor, Synopsys Inc., Qualcomm, Elliptic Technologies, Insight Design Labs Inc., and academic positions at the University of Waterloo and Sharif University of Technology. Highlights include leading the architecture and implementation of DDR PHY IPs and HBM3 PHY testchips, serving as the technical lead on Random Number Generator IPs, and developing cryptographic cores within tight project timelines. Farhad holds a Master of Applied Science in Electrical and Computer Engineering from the University of Waterloo and a Bachelor of Science in Electrical Engineering from Sharif University of Technology.