Itay Fogel has worked as a VLSI Design Engineer at Autotalks since August 2021, and was previously a Logic Design Engineer at Spansion from January 2015 to July 2021. At Spansion, they were responsible for design ownership of several blocks and flows, including critical routes in the design timing-wise with power consumption awareness. Itay also worked with cross-functional teams, participated in all phases of the project life cycle, and had experience in project definition, feasibility, architecture, rtl design, and silicon support.
Itay Fogel obtained their Bachelor's degree in Electrical and Electronics Engineering from Tel Aviv University. Itay pursued their education at the university from 2010 to 2014.
August, 2021 - present