ZZ

Zhihong Zeng

Verification IP Architect at Avery Design Systems

Mr. Zeng received his PHD in semi-formal based functional verification at UMASS, Amherst. Prior to his PHD, he earned M.S.E.E on ASIC designer and started a career as an IC designer in Lenovo. Since joined the force in Avery, Mr. Zeng architected and led development in various verifications IPs like, USB, MIPI/Unipro, SOP/PQI, NVMe and PCIe and oversees R&D of other VIPs.

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Timeline

  • Verification IP Architect

    Current role