Abhilash Chadhar

Abhilash Chadhar has a wealth of work experience in the field of design verification engineering. Abhilash has worked for Axelera AI since 2022 as a Senior Verification Engineer. Prior to that, they were employed by Intel Corporation from 2015 to 2022, where they held various roles such as Design Verification Engineer (AI accelerators), Digital Design Engineer, Analog Mixed Signal Design Verification Engineer, Pre-silicon Design Verification Engineer, and Graduate Intern. In 2015, they also worked as an Intern at ISRO - Semiconductor Laboratory (SCL). Abhilash was a Teaching Assistant at Indian Institute of Space Science and Technology (IIST) from 2014 to 2015, and Industrial Trainee at CMC LTD from 2012 to 2013 and 506 Army Base Workshop from 2011 to 2012.

Abhilash Chadhar has a diverse educational background. Abhilash completed a Master of Technology (M.Tech.) in VLSI and Microsystems at the Indian Institute of Space Science and Technology from 2014 to 2016. Prior to that, they obtained a Post Graduate Diploma in VLSI and Embedded Hardware Design from NATIONAL INSTITUTE OF ELECTRONICS & INFORMATION TECHNOLOGY (NIELIT) in 2014. In addition, Abhilash has obtained various certifications, including Digital Electronics & Logic Design from Udemy in June 2022, Writing a Tech Resume from LinkedIn in May 2022, VLSI Broadband communication EE6322 from NPTEL in May 2020, PCIe training - Intel from Intel Corporation in March 2019, Digital Systems: From Logic Gates to Processors from Coursera in February 2019, and The Procrastination Cure (Blinkist Summary) from LinkedIn.