Bram Rooseleer

Bram Rooseleer has worked in the engineering field since 2008. Bram began as a research assistant at K.U. Leuven, ESAT-MICAS in 2008, and then became an associated researcher at imec in 2013. In 2014, they worked as a Design Engineer at CMOSIS, and then as a Senior Design Engineer and Principal Design Engineer at sureCore Ltd until 2019. Currently, they are a Senior Mixed Signal Design Engineer at Axelera AI.

Bram Rooseleer received their Ph.D. in Electrical and Electronics Engineering from KU Leuven in 2014. Prior to that, they earned an ir in Electrotechnical Engineering from KU Leuven in 2008.