Ajay Raghuvanshi

Ajay Raghuvanshi is a skilled Senior Hardware Design Engineer currently engaged with Bit Mapper Integration Technologies Pvt. Ltd, a Phoenix Group Company, since February 2023. Prior experience includes roles as a Senior Hardware Engineer at L&T Technology Services and a Hardware Engineer at GS Lab, along with significant contributions as a Printed Circuit Board Design Engineer and Embedded Hardware Engineer at previous organizations. Ajay's educational background includes a Bachelor's degree in Electrical, Electronics and Communications Engineering from Sant Gadge Baba Amravati University, completed in 2018.

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