Hsin Hung Lu

Hsin Hung Lu is a proven engineering professional with extensive experience in signal integrity and product engineering, currently serving as a Principal Product Engineer at Cadence Design Systems since August 2019, following a role as Lead Product Engineer. Prior experience includes serving as a Signal Integrity Engineer at Inspur Group, where responsibilities involved server PCB SI simulation and PCB stack-up design, and as a Design Signal Integrity Engineer at Molex, focusing on connector simulation and design. Hsin Hung Lu's career began at Flextronics with a focus on server PCB SI simulation and layout constraints. Academic credentials include a Master's Degree in Electrical, Electronics and Communications Engineering from National Taiwan University and a Bachelor's Degree in Electrical and Electronics Engineering from National Central University.