Víctor Zeib Bort

Víctor Zeib Bort has extensive work experience in firmware design engineering and software development. Víctor started their career in 2003 as a Design Engineer in the Digital R&D Department at DS2. In 2006, they moved to Design of Systems on Silicon (DS2) as an R&D Senior Software Engineer, where they specialized in firmware design for Powerline modems and FPGAs prototypes. At Marvell Semiconductor, starting from 2010, they worked as a Senior Firmware Design Engineer, responsible for specifying, designing, and implementing firmware for Powerline modems and FPGAs prototypes. Víctor'srole also involved analyzing and specifying software architecture for Powerline firmware development. Víctor joined MaxLinear in 2017 as a Staff Firmware Design Engineer, and later in 2018, they joined Casa Systems, Inc. as a Principal Software Engineer (Small Cell).

Víctor Zeib Bort obtained their Msc degree in Telecommunications Engineering from the Universitat Politècnica de València (UPV) from the years 1996 to 2001.