Asif Ahamad

Asif Ahamad is an experienced ASIC/FPGA Design Engineer currently employed at Ciena since March 2022, where the individual has progressed from ASIC/FPGA Design Engineer 1B to 2A. Prior to this role, Asif worked as an FPGA Engineer at UnivLabs from June 2021 to March 2022 and as an Engineer in the D&E department at Bharat Electronics Limited from December 2020 to June 2021. Earlier experience includes a position as an R&D Engineer focused on RTL Design at LOGIC-FRUIT TECHNOLOGIES from June 2019 to November 2020. Asif holds a Bachelor of Technology degree in Electrical, Electronics and Communications Engineering from the National Institute of Technology, Uttarakhand, completed in 2019.