Suren Avushyan

Suren Avushyan is a Senior Analog Layout Design Engineer at Ciena, having joined in June 2023. Prior to this role, Avushyan worked as a Senior ASIC Backend Design Engineer at Cisco from January 2022 to May 2023, and as an A&MS Layout Design Engineer at Synopsys Inc from April 2017 to January 2022, focusing on GDS/OASIS reviews and physical implementation of analog and mixed signal circuitry in advanced technology nodes. Avushyan holds a PhD in Micro- and Nano-electronics from the National Polytechnic University of Armenia (2019-2022), along with two Bachelor's degrees in Electrical and Electronics Engineering from the National Polytechnic University of Armenia (2013-2017) and Budapest University of Technology and Economics (2014-2015), as well as a Master's degree in the same field from the National Polytechnic University of Armenia (2017-2019).