Omkar Turewale

Omkar Turewale is an experienced ASIC Design Engineer currently at Cisco since June 2025, focusing on advanced chip design. Previously, Omkar held the position of Senior Digital Design Engineer at Silicon Labs from August 2023 to May 2025, where responsibilities included the micro architecture and integration of USB IP and development of a charging port detection module using Verilog/System Verilog. Prior experience at Ambiq as a Staff Engineer involved working on ARM core-based SoCs, while roles at Texas Instruments and pSemi included digital design, RTL implementation, and collaboration with marketing teams for product specifications. Education includes a Master of Science in Electrical Engineering from Arizona State University and a Bachelor of Engineering in Electronics Engineering from Vishwakarma Institute of Technology, Pune.