Maryam Shaeri is a seasoned professional in the field of silicon engineering and RF/IC design, currently serving as Head of Silicon Engineering at CML Micro since May 2024. Prior to this role, Maryam was Head of R&D at Crypto Quantique, focusing on silicon PUF security and TRNG architecture. Maryam's extensive experience includes positions as Senior Principal Design Engineer at Phasor and Senior RF/IC Design Engineer at Huawei Technologies, where contributions involved cutting-edge design and development in high-frequency IC circuitry and receivers. Earlier roles at CML Microcircuits, IMS Technologies, Nokia Networks, and Mitel reflect a consistent focus on RF/IC design and technology feasibility. Maryam holds multiple degrees, including an MEng in Electronics Engineering from Imperial College London and two PhDs from the University of Nottingham in Theoretical and Mathematical Physics and Quantum Cosmology.
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