Chien-Ping Kao

Chien-Ping Kao has worked in the field of signal integrity for over 10 years. In 2020, they became the Signal Integrity Technical Lead at Cornelis Networks. Prior to this, they were the Signal Integrity Technical Manager at Intel Corporation from 2015-2020, where they lead a SI team and managed SI projects for high-speed switch board design, as well as developing Intel Omni-Path SI specifications for high performance computing. From 2010-2015, Kao worked as a Sr. Development Engineer - Signal Integrity / EMI / EMC at Foxconn USA, where they designed and developed high speed interconnect system and performed signal integrity modeling and analysis. From 2009-2010, Kao worked as a MRI Research Fellow at Hershey Medical Center, where they designed patch antenna array and waveguide for RF field excitation at ultrahigh field MRI.

Chien-Ping Kao received their PhD in Electrical and Computer Engineering from the University of Houston between 2003 and 2007. Prior to that, they earned a Master's Degree in Geophysics and Seismology from National Central University between 1998 and 2001.