Pavan Shanbhag

Pavan Shanbhag is an experienced engineer specializing in VLSI design and verification, currently serving as a Staff Elect Design Engineer at Cypress Semiconductor Corporation since December 2016 and as a Staff II - IC Design Engineer at Broadcom Communications since June 2014. Pavan has a significant history at Cypress Semiconductors and Broadcom, contributing to Gatesim bringup for pre/post layout netlist with zero delay across various corners and automation flow. Previous roles include Senior VLSI Verification Engineer for multiple companies, including Broadcom in Bangalore and Infotech Enterprises, starting from June 2010. Pavan's earlier experience includes work as a VLSI Design and Verification Engineer at AXIOM EDA Products and an Embedded Software Engineer at SDC. Academic qualifications include a B.E. and M.S. in VLSI from Manipal Academy of Higher Education, completed in 2008.