Abhay Gupta

Abhay Gupta is a seasoned engineering professional with extensive experience in ASIC design and technical leadership across several prominent companies. Currently serving as a Member of Technical Staff at DataPelago since July 2021, Abhay previously contributed significantly to Juniper Networks as an ASIC Design expert focused on front-end design for next-generation core router technologies. Prior roles include Chip Lead at Brocade, overseeing the development of 10/40/100G traffic management solutions, and Project Lead at Pixelworks, managing LCD panel TCON design. Abhay's earlier career includes critical positions at Infineon as Design Manager, where a patented SOC interconnect bus protocol was drafted, and at Intel Corp as Staff Architect for a groundbreaking mobile integrated chipset. Abhay holds a Bachelor's degree in Electrical and Electronics Engineering from Delhi University.