Risto Bell

Risto Bell is a Principal Engineer at Efabless. Risto has over 20 years of experience in the semiconductor industry, and has been a key contributor to IP deliverables and the development of IP infrastructure. Risto has also developed and administered IP repositories, trained analysts, and created automated IP entry checks. In addition, they have led the project to standardize cell place & route design flow support for the Pentium hyperCache three-chip set.

Risto Bell graduated from Cornell University with a Bachelor of Science in Electrical Engineering.

Risto Bell reports to Mohamed Kassem, CTO. They work with and Greg Shaurette - SVP, Web & IT.