Jérôme Sauger

ASIC Verification Engineer at ELSYS Design

Jérôme Sauger has work experience in various companies. Jérôme worked at Elsys Design as an ASIC Verification Engineer, where they were involved in the pre-tapeout validation of SoCs for the automotive industry. Jérôme'sresponsibilities included test and driver development in low-level C, in-circuit emulation on Palladium Z1, debugging with Trace32, and using CANOe software to communicate with the chip. Jérôme also had an internship at Elsys Design, where they developed a UART Verification IP for Top Verification. This involved developing the VIP with the UVM framework, creating a testbench and sequences, and writing automated non-regression tests. Jérôme also had a summer internship at GoodFloow in 2020 and an internship at CCN Service Connectivité d'EDF in 2019.

Jérôme Sauger's education history is as follows:

From 2018 to 2021, Jérôme attended IMT Atlantique where they obtained an Engineering degree in the field of Embedded systems and robotics.

In 2020, they also spent a year at the University of Twente, pursuing a Master 1 (M1) degree in Embedded systems.

Prior to their university studies, from 2016 to 2018, Jérôme attended Lycée Eugène Livet, where they underwent preparatory classes to engineering schools (PTSI-PT*).

Before that, from 2013 to 2016, they completed their Baccalauréat général at Lycée Saint Joseph du Loquidy. Jérôme'sfocus during this period was on sciences.

Additionally, in June 2019, Jérôme obtained an IELTS certification with a C1 level and a score of 8.0/9.0 from the IELTS Official institution.

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