Rajesh Kashyap

Rajesh Kashyap has extensive experience in the semiconductor and electronics industries, holding significant leadership positions at major companies. Currently, Rajesh serves as the Head of ASIC IP and Head of COT IP Physical Design at Ericsson. Prior to this, Rajesh was a Group Director in R&D at Synopsys Inc. and held various roles including Vice President, Sr. Director, and Director at Samsung Austin R&D Center. Earlier in the career, Rajesh was an Engineering Manager at Intel and a Design Engineer at Analog Devices Inc. Rajesh holds a Master of Science in Electrical and Electronics Engineering from The University of Texas at Dallas and has furthered education at The University of Texas at Austin.