Tushar Wakharkar

Tushar Wakharkar has over 26 years of work experience in the field of ASIC and hardware engineering. Tushar is currently working as an ASIC Design Engineer at Fungible, Inc. since November 2021. Prior to this, Tushar worked at Apple as a Design Engineer from May 2017 to November 2021.

Before their time at Apple, Tushar held the position of Senior ASIC/Hardware Engineer at Juniper Networks from January 2001 to May 2017. In this role, they worked on major proprietary networking chips and had expertise in verilog-based design, synthesis, verification, timing analysis, and the entire ASIC flow. Tushar also worked in various roles, including individual contributor, lead, architect, and integration.

Tushar's work experience also includes their time as a Staff Engineer at Philips Semiconductors, where they were involved in architecting the next generation of a digital video platform chip and verifying DDR memory controller using verilog TB.

At the beginning of their career, Tushar worked as a Hardware Specialist at Wipro Technologies. Their roles in this position included the architecture and design of ARM7 based SoC for the WinCE platform. Tushar also led an IP design team for SoCs.

Throughout their career, Tushar has gained expertise in industry-standard tools, scripting, and ASIC methodologies.

Tushar Wakharkar completed their Bachelor of Engineering (B.E.) in Electronics at Vishwakarma Institute of Technology from 1988 to 1992. Tushar then pursued a Master of Technology (MTech) in Electrical and Electronics Engineering at the Indian Institute of Science (IISc) from 1993 to 1995.