Arunachalam Annamalai

Arunachalam Annamalai is a CPU Performance Architect at Google, a position held since April 2022. Previously, Arunachalam worked at AMD from June 2013 to April 2022 as a Senior Member Of Technical Staff, where significant contributions included leading performance correlation efforts for the Zen 3 core and engaging in post-silicon validation. Earlier experience includes serving as a Graduate Research Assistant at the University of Massachusetts Amherst from January 2011 to April 2013, focusing on dynamic runtime solutions for Asymmetric Multicore Processors, with notable projects in dynamic core morphing and thread scheduling. Additionally, Arunachalam interned at Qualcomm in 2012 and held various engineering roles at AMD from 2007 to 2010, including contributions to floorplanning and cache controller design. Arunachalam holds a Master of Science in Computer Engineering from the University of Massachusetts Amherst and a Bachelor of Engineering in Electronics and Communication from Madras Institute of Technology, Anna University.