VENUGOPAL SANTHANAM possesses extensive experience in the field of digital design and engineering, holding various positions at leading technology companies. At CoreEL Technologies, VENUGOPAL served as Tech Lead, focusing on hardware validation for Nextreme's Network Search engine and FPGA-based systems for defense applications. Transitioning to Synopsys Inc, roles included R&D Engineer Sr-II, contributing to high-speed Ethernet technologies, followed by advancements as Sr. Staff Engineer and Sr. Manager in ASIC Digital Design, developing multiport encoders and high-speed subsystems. Currently, as TPU ASIC Design Lead at Google, VENUGOPAL leverages a solid educational foundation with a Master’s degree in Communication Engineering from Manipal Academy of Higher Education. Career beginnings included a Design Engineer position at Bharat Electronics, specializing in radar receiver systems.
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