Ioannis Pavlidis

Design Verification Engineer at HDL Design House

Ioannis Pavlidis is a Design Verification Engineer at HDL Design House since January 2021. Prior to this, they worked as an Engineer at Εnergy Technologies "ENTE" where they specialized in PV Design, O&M, and PV Investment valuation. Additionally, they have experience as a Freelancer and served as an Assistant at the Computer Informatics and Research Office in the Greek Army. They also completed an internship at ΑΚ ΚΑΛΙΝΙΚΙΔΗΣ. Ioannis holds a Master's degree in Informatics from Aristotle University of Thessaloniki and a 5-year Engineering Diploma in Electrical and Electronics Engineering.

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