Bruce G.

Senior Failure Analysis Engineer at Ideal Semiconductor Devices

Bruce G. has over forty years of work experience, beginning in 1970 as an Interior Communications Electrician for the US Navy. In 1997 they began working as a Failure Analyst for Harris Corporation, where they had a major role in the successful release of UltraFET planar Nch low voltage technology with many proliferations. In 2002 they moved to Intersil as a Failure Analyst, where they had a major role in the successful release of UltraFET Trench Nch low voltage technology with many proliferations and next Gen IGBT technology's with many proliferations. In 2005 they moved to Fairchild Semiconductor as a Failure Analyst, where they had a major role in the successful release of Power Trench III thick bottom oxide Nch low voltage technology with many proliferations and Power Trench II Pch low voltage technology with many proliferations. In 2007 they began working as a Failure Analysis Lab Manager for Ciclon Semiconductor Device Corp, where they had a major input in the successful release of GEN 1 NexFET super efficient Pch low voltage technology and GEN 1 NexFET super efficient Nch low voltage technology with many proliferations. From 2009 to 2019 Bruce G. worked for Texas Instruments as a Failure Analysis Lab Manager and Lead Technologist, where they had a major role in the successful release of GEN 1 and managed the Analytical Lab at LVDAO Power MOSFET Product Line. Since 2019 Bruce G. has been working for iDEAL Semiconductor as a Senior Failure Analysis Engineer and Consultant.

Bruce G. attended the US Navy in San Diego, CA from 1970 to 1974, where they studied Electrical, Electronics and Communications Engineering. Bruce also attended Lincoln Tech, where they studied Electrical and Electronics Engineering.

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Previous companies

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Timeline

  • Senior Failure Analysis Engineer

    August, 2019 - present

  • Consultant

    April, 2019