Chenming Hu

Dr. Chenming Hu, Professor Emeritus of EECS at UC Berkeley, is the visionary inventor of the FinFET or 3D transistor architecture. He is a world’s foremost authority on CMOS device physics, modeling and manufacturing. To address the limits of Moore’s law scaling in CMOS transistors, Dr. Hu conceived the tri-gate FinFET design that enables further scaling and integration in the third dimension by stacking-up transistors vertically. Intel began commercializing the 3D transistor based chips in 2011, with most others following soon. Dr. Hu served as Chief Technology Officer of TSMC from 2001 to 2004. He has authored four books and 900 research papers, and has been granted over 100 US patents.