TEJASWINI CH

Tejaswini CH started working as a Trainee at VEDA IIT in February 2021 and continued in that role until August 2021. They then joined INVECAS in August 2021 as an Analog Layout Engineer, where they were trained in Analog Layout from VEDA IIT and worked with Synopsys Tool as a Layout Engineer in the VLSI domain. In July 2022, Tejaswini CH transitioned to the role of Physical Design Engineer at INVECAS.

Tejaswini CH obtained a Bachelor of Technology degree in Electronics and Communication Engineering from Sreenidhi Institute of Science and Technology between the years 2017 and 2021.