Alexandre Blampey

Alexandre Blampey has been working as the Digital Hardware Team Manager at ASYGN since March 2019. In this role, they lead the team responsible for FPGA and ASIC development, including architecture, RTL design, RTL verification, synthesis, and CPU firmware development. Prior to joining ASYGN, they worked as a Hardware Design Engineer at Kalray since April 2009.

Alexandre Blampey obtained their Engineer's degree in Microelectronics from CentraleSupélec between 1999 and 2003. Later on, they pursued higher education and completed their Doctor of Philosophy (Ph.D.) in Microelectronics at Grenoble INP - UGA from 2013 to 2016.