Duy Nguyen

Duy Nguyen is a highly skilled Design Verification Staff Engineer at Marvell Technology since July 2021, with expertise in DSP testing and GLS. Previous experience includes roles as a Design Verification Senior Engineer, focusing on design verification, and as a Design Verification Engineer at Inphi Corporation from May 2020 to July 2021, where responsibilities involved SERDES, MATLAB, and defining verification plans using advanced frameworks like UVM and OVM. From March 2015 to May 2020, Duy worked at Arrive Technologies, Inc. as a Design Verification Engineer, employing System Verilog and UVM to build testing environments and simulate in Cadence tools. Early career experience includes positions in business development and an internship at VNPT HCMC. Duy holds a Master of Engineering in Telecommunications Technology from Ho Chi Minh City University of Technology and a Bachelor of Engineering in Electronics and Telecommunications from the same institution.