Raghavendra V

Raghavendra V is a skilled engineer specializing in physical design, currently serving as a Staff Engineer at Marvell Technology since July 2020, where responsibilities include overseeing physical design implementation on various projects. Previously, Raghavendra held the position of Senior Engineer in the Physical Design team, contributing to automotive PHY SOC development, and completed an internship focused on advanced technology nodes, resulting in a valuable timing delay database for PD engineers. Earlier experience includes serving as a Graduate Teaching Assistant at Manipal Institute of Technology, where Raghavendra contributed to the development of a comprehensive lab manual. Raghavendra holds a Master of Technology in Microelectronics from Manipal Institute of Technology and a Bachelor of Engineering in Electronics and Communication Engineering from Sir M Visvesvaraya Institute of Technology.