Sneh Shah is a seasoned engineer with extensive experience in design verification and validation within the semiconductor industry. Currently serving as a Senior Staff Design Verification Engineer at Marvell Technology, Sneh has held key positions at notable companies, including Staff Verification Engineer at Western Digital and ASIC Design Verification Engineer at Marvell Semiconductor. Early career roles included Validation Engineer Intern at Samsung Semiconductor and Test Engineer Intern at Granite River Labs. Sneh holds a Master of Science in Electrical and Electronics Engineering from Santa Clara University and a Bachelor of Science in Electrical Engineering from the University of Southern California.
December, 2021 - present
May, 2013