Viranagouda Patil

Viranagouda Patil is a DEG Layout Design Engineer at Micron Technology since September 2024, previously serving as a Custom Layout Design Engineer at Sankalp Semiconductor from September 2021 to September 2024. Viranagouda holds a Bachelor of Engineering degree in Electronics and Communications Engineering from KLE Technological University in Hubballi, India, where studies were completed between 2017 and 2021.