RB

Ramprasad B

Asic Design &verification Engineer at Mirafra Technologies

Ramprasad B is an experienced engineer with a total of 6 years in ASIC Verification, GLS Verification, and DFx Validation. Currently serving as an Advanced Engineer at Test and Verification Solutions since September 2016, Ramprasad also holds a position as an ASIC Design & Verification Engineer at Mirafra Technologies since March 2015. Prior experience includes working as a Verification Engineer at both Test and Verification Solutions and the earlier stint at Mirafra Technologies. Ramprasad holds a Bachelor of Engineering (BEng) in Electronics and Communications Engineering from PDIT, Hospet, obtained in 2011.

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