Vishwajith V Bharadwaj

Vishwajith V Bharadwaj is an experienced Senior Verification Engineer at Mirafra Technologies since October 2022, with prior roles at Cerium Systems from February 2018 to October 2022, where responsibilities included Engineer and Project Engineer positions. Vishwajith also worked as a VLSI Design and Verification Engineer at Maven Silicon from July 2017 to February 2018. Educational qualifications include a Bachelor of Engineering in Electrical, Electronics, and Communications Engineering from Sapthagiri College of Engineering (2013-2017), a Pre-University Course in PCME from Hymamshu Jyothi Kala Peetha (2011-2013), and a Secondary School Leaving Certificate from Vijaya Vittala Vidya Shala (2008-2011).