Anjana Ghosh

Director Of Architecture And Design at Morphing Machines

Anjana Ghosh is a seasoned professional with extensive experience in architecture and design, currently serving as the Director of Architecture and Design at Morphing Machines since September 2023. Previously, Anjana held the position of Principal Engineer at Intel Corporation from April 2020 to June 2023 and was a Systems Architect at the Indian Institute of Science from February 2019 to April 2020. Anjana also contributed as a Senior Manager at Canon India from January 2015 to February 2019, where leadership of multiple IP development projects in digital frontend design was a key responsibility. Anjana's earlier roles at Texas Instruments included various leadership positions involving design and architecture of wireless connectivity and digital design projects. Anjana holds a Master of Science in Engineering from the Indian Institute of Science and a Bachelor's degree in Electronics and Telecommunication Engineering from Jadavpur University.

Location

Bengaluru, India

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Morphing Machines

Morphing Machines Pvt Ltd is a closely held fabless semiconductor company based in Bangalore. Morphing Machines was launched from the Technology Entrepreneurship Initiative of the Indian Institute of Science at Bangalore. The patented REDEFINE™ technology from Morphing Machines is a path-breaking new SoC architecture and platform for implementing run-time reconfigurable silicon cores for massively parallel and heterogeneous many-core processors. A single REDEFINE™ based application core accelerates an entire class of related applications while optimizing space and power usage. REDEFINE™ enables ASIC-like high performance at an affordable NRE cost for a much wider range of compute-intensive applications than has ever been possible before. The REDEFINE™ Meta Compiler framework enables targeting application implementations to a REDEFINE™ application core through automatic concurrency analysis and generation of hardware reconfiguration meta-data, supported by cycle-accurate REDEFINE™ Simulators for pre-synthesis design validation. REDEFINE™ silicon core IPs in multi-protocol cryptography and other application areas have been adopted by key customers in India and Europe. Other REDEFINE™ and Morphing Machines IPs include XNOC network-on-chip, XFloat floating point and linear algebra engine, AES, ECC, SHA, and other crypto IPs, and many more.


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Headquarters

Bangalore, India

Employees

11-50

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