Roal Eikeland

Roal Eikeland is a seasoned engineer with extensive experience in FPGA design, system architecture, and project management within the electronics industry. Currently serving as a Senior FPGA Engineer at NDT Global since February 2022, Eikeland previously held the position of Senior Electronics Engineer at Octio AS from April 2014 to January 2022, focusing on digital function development in System On Chip circuits. Eikeland's prior roles include FPGA Designer and Group Leader at Ceragon Networks, as well as System Designer positions at Nera Networks AS, where responsibilities spanned from digital function development in Altera and Xilinx circuits to project management and technical leadership. Eikeland's educational background includes a Master of Science in Electrical and Electronics Engineering from Norges Tekniske Høgskole and a Bachelor of Science from Agder Ingeniør og Distriktshøgskole.