Strahinja Petrovic is an experienced software engineer and team leader with a strong background in compiler development and machine learning compiler optimization. With a current position as Compiler Team Lead and Senior Software Engineer at NextSilicon since December 2021, Strahinja has been instrumental in the delivery and development of machine learning compilers and compiler optimizations. Prior to this role, Strahinja worked as a Senior Software Engineer at HTEC Group from November 2019 to December 2021, focusing on compiler optimizations to enhance performance. Before joining HTEC Group, Strahinja contributed to the development of the LLVM toolchain, including the compiler, linker, and assembler, at RT-RK from May 2013 to November 2019. Strahinja holds a Master's degree in Computer Engineering Technology from the University of Novi Sad and a Bachelor's degree in Computer Engineering from the same institution.
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