Deep Narula

Deep Narula currently holds the position of Principal Engineer/Manager at NXP Semiconductors since September 2022, leading Design for Testability (DFT) initiatives. Prior to this, Deep Narula worked at Qualcomm as a Senior Lead Engineer from July 2019 to March 2023, specializing in DFT for Automotive applications and serving as a LBIST Architect. Deep Narula's experience includes developing methodologies for End2End LBIST verification in compliance with ISO26262 safety standards. Earlier roles include a Design Engineer position at NXP Semiconductors (formerly Freescale Semiconductors) focusing on DFT for low power microprocessors, and various internships in VLSI design. Deep Narula holds a Bachelor of Technology in Electronics and Communications Engineering from Delhi College of Engineering. Deep Narula is also a Certified Functional Safety Engineer Level 1 in Automotive.