Analog/Mixed-Signal Verification Engineer focusing on high-performance analog-to-digital and digital-to-analog converters. Job responsibilities include development and verification of the digital circuits for high performance data converters, behavioral modeling, customer support, and assisting with synthesis and place-and-route
Qualifications
- Good knowledge of Verilog RTL coding including state machines, adders, multipliers, combinatorial logic, etc
- Good understanding of digital design for mixed signal control loops and designing Verilog / Verilog- A code to control analog circuits (e.g. digital backend for ADC, digital PLL, etc)
- Familiarity with behavioral Verilog / Verilog-A code, including wreals
- Ability to write thorough testbenches for digital (e.g. Encounter) and AMS simulators
- Basic understanding of SystemVerilog and assertions preferred
- Familiarity with place and route tool flow preferred but not mandatory
- MATLAB understanding would be preferred
- Deep understanding of constraints, especially for mixed-signal designs, including multiple clock domains and clock gating
- Familiarity with timing closure and static timing analysis tools
- Experience with scan chain vector generation and verification
- Familiarity with Cadence Encounter tool flow preferred but not mandatory