Vaibhav Tripathi

Dr. Vaibhav Tripathi received Ph.D. and MS degrees in Electrical Engineering from Stanford University and B.Tech in Electrical Engineering from the Indian Institute of Technology (IIT), Kanpur.

In 2010, he was with Texas Instruments, Dallas, working on high-speed comparators. From 2014 to 2016, Vaibhav worked in the high-speed data converters group at Maxim Integrated, where he helped design a low-power 14b, 250 MS/s pipelined SAR ADC. From 2016 to 2018, he was a staff design engineer at Samsung Semiconductor, where he co-led the development of 10b, 2G/s time-interleaved SAR ADC. At Samsung, he was also involved in several RF projects such as low-power BLE receivers for IoTs and mmWave phase shifters.

Dr. Tripathi is a recipient of the Stanford Graduate Fellowship and Analog Devices Outstanding Student Designer Award, and his research interests include data converters and RF/mmWave frontends.