Arash Abbasi

Arash Abbasi is a highly experienced Senior RFIC Design Engineer currently employed at Qorvo, Inc. since October 2024, previously holding the same position at Sequans Communications from April 2020 to September 2024, specializing in circuit design, verification, and debugging for 5G transceivers. Prior experience includes roles as a Research Assistant at the Institute for Microelectronics - TU Wien, focusing on Python programming and transistor characterization, and as a Senior Analog Design Engineer at Symmid Corporation, where responsibilities included Analog RFIC and IC design, as well as testing and measurements. Early career experience involves modifying linearization techniques and analog filters as a Research Assistant at Universiti Putra Malaysia. Arash Abbasi earned a PhD in Analog RF/IC design from École de technologie supérieure (2019-2022), a Master's Degree in electronic engineering from Universiti Putra Malaysia (2012-2015), and a Bachelor's Degree in electrical and electronics engineering from Islamic Azad University (2007-2011).