Jean-Marie TAUPIN

Jean-Marie Taupin has a diverse work experience in the field of Integrated Circuit (IC) design and verification. Jean-Marie began their career in 2001 at Broadcom, where they were involved in SOC and system verification for high-end Pentium4 servers. Jean-Marie worked on DDR1, DDR2, PCIe, PCIX, and AGP technologies.

Jean-Marie then moved to STMicroelectronics in 2003, where they were responsible for SOC integration and verification for video, image processing, and display in set-topbox chipsets. Jean-Marie worked as a PSI-E subcontractor during their time there.

In 2005, Taupin joined Texas Instruments and focused on OMAP Soc verification.

Taupin joined ST-Ericsson in 2007 and held various roles including Multimedia Architect, LPDDR1 and LPDDR2 system expert, digital design and verification, and imaging and video processor verification.

In 2011, they started working at STMicroelectronics again and led the front-end design and architecture of LPDDR3 and LPDDR4 PHY. Jean-Marie also represented STM at JEDEC JC42.6, JC42.

Jean-Marie later joined ARM Norway in 2016 as a digital design and verification engineer, working on RTL digital design and UVM-System Verilog verification of MMU unit within MALI GPU. Jean-Marie was also involved in lint, synthesis, formal verification, coverage reviews, and testbench improvements.

In 2019, Taupin joined SASU HEKLATECH as a freelance consultant, specializing in IC design architecture and verification. Jean-Marie worked on projects for SCALINX and ST Micro, focusing on digital design, verification, synthesis, and ATPG.

In 2023, they started working at SCALINX as a verification engineer.

Overall, Taupin has gained extensive experience in IC design and verification, with a focus on various technologies and project management.

Jean-Marie TAUPIN began their education in 1983 at CentraleSupélec, where they earned a Master's degree in Physical Sciences and Engineering. In 1987 and 1988, they attended l'Ecole du Pétrole et des Moteurs and obtained another Master's degree, this time in Internal Combustion Engines.

In 1994, Jean-Marie completed a program at CentraleSupélec focused on Digital Control Systems and Signal Processing. Then, in 2002, they studied at the University of California, Berkeley, specializing in Analog Design, Mixed Design, CMOS Device, C, Perl, and Digital Design.

In 2009, Jean-Marie pursued further education at ARM, focusing on Cortex A9 HW. Later, in 2012, they attended Cadence to study UVM and System Verilog Verification.

Finally, in 2015, they completed a program at SYNOPSYS, specifically in the area of DFT Automatic Test Generation (ATPG).